In this how-to we present an example to make information flow from a ROS2 topic stream to PLC and vice versa, via the datalayer, using shared memory as communication mechanism.
1. System architecture
The example 'system architecture' is depicted in the next figure.
There are two devices:
- External device: In this case it is a desktop device running a ROS2 application.
- ctrlX CORE: It contains the ROS2 runtime and ROS2 apps, as well as the official Rexroth PLC app.
These two devices are connected in the same Local Network (LAN) to allow the ROS2 DDS discovery to read-write the necessary information.
The information flows in the following way:
- A ROS2 application running in the Desktop device publishes a topic stream under /test_vector3 at 200Hz. It contains a message of type geometry_msgs/msg/Vector3.
- A ROS2 node (shm_dl_subscriber) encapsulated into the ros2-listener-shm-dl app, subscribes to the /test_vector3 topic, writing the information further into the datalayer using shared memory.
- This information is then retrieved by the PLC and mapped into a global variable.
- Some computation happens in the PLC logic, with a cycle time of 5ms (200Hz). In this case a simply copy of the input variable into another variable (that will be mapped to the output).
- The Rexroth PLC app has the functionality to create a location in the datalayer and write memory there, using shared memory. Given this, the output variable is mapped to that location in the datalayer.
- The location in datalayer created by the PLC app is read by a ROS2 Node (shm_dl_publisher) encapsulated in the ros2-talker-shm-dl app. This node publishes under the topic /PLC_output the information that is read from the datalayer, at 200Hz because it is the frequency to which the information arrives.
- The topic stream /PLC_output, which by the way is of the same type as /test_vector3 could be subscribed by another ROS2 program and do further computations with it.
2. Desploymente tests
This exampe has been successfully deployed in ctrlX CORE X3, X7 and virtual, in all of them with a spinning frequency of 200Hz.
In the next picture we can observe a plot of the topics /test_vector3 and /PLC_output.
When looking at the detailed statistics we see a delay of 5ms between /PLC_output and /test_vector3, which is indeed the PLC computation cycle time, being this phenomenon the exactly expected behavior that should be observed.
3. Solution potential
This example shows that a shared memory on the datalayer is an effective strategy to achieve a fast communication between apps running in the ctrlX CORE.
This is critical in real-time applications, in which information streams must flow at high rates. Examples of solutions that demands this would be for instance robotic arms or AGV control, where information between a ROS2 algorithm and a PLC program must be shared.
If you are interested in an application like this one, do not hesitate to leave a comment! We are sure your application will find the perfect match.